Position Description
Tesla's electronics design teams are pushing for high-bandwidth and high-performance designs across two fast-growing domains: energy storage systems and AI computing infrastructure. As link rates climb and power densities increase, signal and power integrity have become first-order design constraints. As an SI/PI validation engineer at Tesla, you will be one of the subject-matter experts embedded with the Energy LV and AI Compute EE teams, owning analysis and validation from early architecture through production release. In addition to your technical role, you will manage the SI/PI lab as a shared resource.
Responsibilities
SI/PI Validation
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Own SI/PI validation across Energy and AI Compute programs, including:
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Memory: LPDDR5/5X and DDR5 validation various memory testing tools, PVT margin sweep, and eye diagram analysis
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PCIe: Gen4/5/6 link training, TX Preset optimization, compliance eye, and root-cause debug of link failures across platform bring-up
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USB: USB 3.x/4 link training and enumeration validation, interoperability, SI root-cause debug for production blockers
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Ethernet: Channel characterization and compliance for 1G/10G/100G/200G/400G; automotive single-pair variants (100BASE-T1, 1000BASE-T1, 10BASE-T1S); SGMII link validation
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Display: eDP, DP, and MIPI DSI/CSI interface validation including eye margin, pre-emphasis tuning, and cable/connector characterization
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Energy-specific: High-speed serial links (40 Gbps+) in high-noise, high-power environments; LVDS, PWM, and analog sense lines across multi-meter cabinet harnesses; switching regulator noise characterization on mixed-signal boards
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Conduct lab measurements using VNA, high-bandwidth oscilloscope, spectrum analyzer, and TDR; correlate measured results against simulation
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Debug SI/PI failures on prototypes and production boards; drive root cause to closure with hardware, firmware, and vendor teams
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Develop scripting and automation for instrument control, measurement data processing, and report generation
Lab Management
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Own day-to-day lab operations: equipment inventory, calibration scheduling, instrument maintenance, and procurement
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Track utilization and coordinate equipment access across concurrent programs
Requirements
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Degree in Electrical Engineering or equivalent industry experience
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3+ years of hands-on SI/PI experience on production PCBs with demonstrated ownership of memory, Ethernet, PCIe, USB, and display interface validation
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Hands-on proficiency with lab instruments: VNA, high-bandwidth oscilloscope, spectrum analyzer, TDR
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Working knowledge of high-speed interface standards and physical layer behavior: DDR/LPDDR, PCIe, USB, Ethernet, SerDes
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Scripting proficiency in Python, MATLAB, or equivalent for automation and data analysis
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Experience managing lab operations including calibration tracking and equipment scheduling
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Collaborative mindset with the ability to communicate SI/PI constraints clearly across disciplines
Bonus skillset
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Power integrity depth: PDN impedance analysis, decoupling strategy, on-die/package modeling, switching regulator noise characterization
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Cutting-edge memory interfaces: HBM3/4, GDDR7, LPDDR6
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High-speed cable and connector characterization (S-parameter de-embedding, fixture compensation)
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Designing for high-noise environments (power electronics, motor drives, HV battery systems)
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EMC fundamentals: conducted/radiated emissions analysis and root-cause debug
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Proficiency in 2D/3D EM simulation tools (Ansys AEDT/HFSS/SIwave, Cadence Sigrity, or equivalent)
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Familiarity with PCB design tools (Cadence Allegro or Altium) and ability to review layout for SI/PI compliance
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System-level validation experience including platform bring-up, interface integration testing, and CM test development
